This invention relates to a magnetic memory, and more particularly, to a large-capacity high-speed magnetic memory having a structure stacking memory arrays including magnetoresistance effect elements of a ferromagnetic tunneling type, for example, and reduced in influences from fluctuations of properties such as junction resistance and MR ratio.
Magnetoresistance effect elements using magnetic films are currently used in magnetic heads, magnetic sensors, etc., and there is a proposal to use magnetoresistance effect elements in a solid-state magnetic memory (magnetoresistance memory or MRAM (magnetic random access memory)).
Recently, a so-called xe2x80x9ctunneling magnetoresistance effect element (TMR element) has been proposed as a magnetoresistance effect element configured to flow a current perpendicularly to the film plane in a sandwich-structured film interposing a single dielectric layer between two magnetic metal layers and to use the tunneling current. Since tunneling magnetoresistance effect elements have been improved to ensure 20% or higher ratio of change in magnetoresistance (J. Appl. Phys. 79, 4724 (1996)), the possibility of civilian applications of MRAM is increasing.
A tunneling magnetoresistance effect element can be obtained by first forming a thin Al (aluminum) layer, 0.6 nm through 2.0 nm thick, on a ferromagnetic electrode, and thereafter exposing its surface to a glow discharge of oxygen or oxygen gas to form a tunnel barrier layer of Al2O3.
There is also proposed a ferromagnetic single tunneling junction structure in which an anti-ferromagnetic layer is provided in one of the ferromagnetic layers on one side of the single ferromagnetic tunneling junction and the other ferromagnetic layer is used as a magnetically pinned layer (Japanese Patent Laid-Open Publication No. H10-4227).
Other type ferromagnetic tunneling junction structures, namely, one having a ferromagnetic tunneling junction via magnetic particles distributed in a dielectric material and one having double ferromagnetic tunneling junctions (continuous film) have been proposed as well (Phys. Rev. B56(10), R5747 (1997), J. The Magnetics Society of Japan 23, 4-2, (1999), Appl. Phys. Lett. 73(19), 2829 (1998), Jpn. J. Appl. Phys. 39, L1035(2001)).
Also these ferromagnetic tunneling junctions have been improved to ensure a ratio of magnetoresistive change from 20 to 50% and to prevent a decrease of the ratio of magnetoresistive change even upon an increase of the voltage value applied to tunneling magnetoresistance effect elements to obtain a desired output voltage, and there is the possibility of their applications to MRAM.
Magnetic recording elements using such a single ferromagnetic tunneling junction or double ferromagnetic tunneling junctions are nonvolatile and have high potentials such as high write and read speed not slower than 10 nanoseconds and programmable frequency not less than 1015 times. Especially, ferromagnetic double-tunneling structures ensure large output voltages and exhibit favorable properties as magnetic recording elements because the ratio of magnetoresistive change does not decrease even upon an increase of the voltage value applied to tunneling magnetoresistance effect elements to obtain a desired output voltage value as mentioned above.
With regard to the memory cell size, however, those existing techniques involve the problem that the size cannot be decreased below semiconductor DRAM (dynamic random access memory) when a 1 Tr (transistor)-1 TMR architecture (disclosed, for example, in U.S. Pat. No. 5,734,605) is employed.
For overcoming the problem, there are proposals such as a diode-type architecture in which TMR cells and diodes are serially connected between bit lines and word lines (U.S. Pat. No. 5,640,343), and a simple-matrix architecture in which TMR cells are placed between bit lines and word lines (DE 19744095, WO 9914760).
However, if the bit size is decreased to increase the memory capacity, then the output from the magnetoresistance effect element also decreases, and S/N upon recording and reproduction decreases.
In case two magnetoresistance effect elements are combined to perform so-called xe2x80x9cdifferential operationxe2x80x9d by recording data in these elements in a complementary manner and detecting a difference between their outputs, it is possible to double the output signal and obtain higher S/N. However, in order to perform such differential operation, recording and reading with the pair of combined magnetoresistance effect elements must be conducted under the same condition. If the recording or reading condition of one of the magnetoresistance effect elements varies, the output signal also varies, and a recording/reproducing error occurs.
Therefore, an architecture less affected by such fluctuations is indispensable to realize a giant capacity magnetic memory.
According to an embodiment of the invention, there is provided a magnetic memory comprising:
a first wiring extending in a first direction;
a first magnetoresistance effect element formed on the first wiring and having a magnetic recording layer;
a second magnetoresistance effect element formed under the first wiring and having a magnetic recording layer;
a second wiring extending in a direction across the first direction above the first wiring;
a third wiring extending in a direction across the first direction below the first wiring;
a recording circuit which supplies a current to the first wiring while supplying a current to the second and third wirings respectively, and thereby exerting a current magnetic field to the magnetic recording layers in order to record one of two values of two-valued information; and
a reading circuit which detects a difference between output signals obtained from the magnetoresistance effect elements by supplying a sense current to the first and second magnetoresistance effect elements via the first wiring in order to read out the recorded data as one of two values of the two-valued information,
directions of magnetization in the recording layers of the first and second magnetoresistance effect elements being oriented in opposite directions from each other by supplying the current to the first wiring upon recording of one of two values of the two-valued information.
According to another embodiment of the invention, there is provided a magnetic memory comprising:
a first wiring extending in a first direction;
a first magnetoresistance effect element formed on the first wiring and having a magnetic recording layer;
a second magnetoresistance effect element formed under the first wiring and having a magnetic recording layer;
a second wiring extending in a direction across the first direction above the first wiring;
a third wiring extending in a direction across the first direction below the first wiring;
one end of the second wiring and one end of the third wiring being connected together to form a single current path;
a recording circuit which supplies a current to the first wiring while supplying a current to the single current path, and thereby exerting a current magnetic field to the magnetic recording layers in order to record one of two values of two-valued information; and
a reading circuit which detects a difference between output signals obtained from the magnetoresistance effect elements by supplying a sense current to the first and second magnetoresistance effect elements via the first wiring in order to read out the recorded data as one of two values of the two-valued information,
directions of magnetization in the recording layers of the first and second magnetoresistance effect elements being oriented in opposite directions from each other by supplying the current to the first wiring upon recording of one of two values of the two-valued information.
According to yet another embodiment of the invention, there is provided a magnetic memory comprising:
a first wiring extending in a first direction;
a first magnetoresistance effect element formed on the first wiring and having a magnetic recording layer;
a second magnetoresistance effect element formed under the first wiring and having a magnetic recording layer;
a second wiring extending in a direction across the first direction above the first wiring;
a third wiring extending in a direction across the first direction below the first wiring;
a recording circuit which supplies a current to the first wiring while supplying a current to at least one of the second and third wirings, and thereby exerting a current magnetic field to at least one of the magnetic recording layers in order to record one of multiple values of multi-valued information; and
a reading circuit which detects a difference between output signals obtained from the magnetoresistance effect elements by supplying a sense current to the first and second magnetoresistance effect elements via the first wiring in order to read out the recorded data as one of multiple values of the multi-valued information
According to yet another embodiment of the invention, there is provided a magnetic memory comprising:
a first wiring extending in a first direction;
a first magnetoresistance effect element formed on the first wiring and having a magnetic recording layer;
a second magnetoresistance effect element formed under the first wiring and having a magnetic recording layer;
a second wiring extending in a direction across the first direction above the first wiring;
a third wiring extending in a direction across the first direction below the first wiring;
a switching element connected between one end of the second wiring and one end of the third wiring;
a recording circuit which controls the switching element to hold the one end of the second wiring and the one end of the third wiring in connection to form a single current path and supplies a current to the first wiring while supplying a current to the single current path, and thereby exerting a current magnetic field to the magnetic recording layers in order to record one of multiple values of multi-valued information, the recording circuit controlling the switching element to hold the one end of the second wiring and the one end of the third wiring in disconnection and supplying a current to the first wiring while supplying a current to at least one of the second and third wirings, and thereby exerting a current magnetic field to at least one of the magnetic recording layers in order to record another of multiple values of the multi-valued information; and
a reading circuit which detects a difference between output signals obtained from the magnetoresistance effect elements by supplying a sense current to the first and second magnetoresistance effect elements via the first wiring in order to read out the recorded data as one of the multiple values of the multi-valued information.
Because the above-summarized structure uses the pair of magnetoresistance effect elements stacked on and under the first wiring and makes use of their differential operation, it contributes to preventing fluctuations of the wiring environment, stabilizing the differential operation, simplifying the memory cell structure and thereby realizing a large-capacity high-integrated memory.
In the specification, the term xe2x80x9cmulti-valued informationxe2x80x9d means information of three or more values, such as information of four values including the xe2x80x9c0xe2x80x9d level, xe2x80x9c1xe2x80x9d level, xe2x80x9c2xe2x80x9d level and xe2x80x9c3xe2x80x9d level.
According to this and other embodiments of the invention, wiring environments of the pair of magnetoresistance effect elements can be uniformed by locating these magnetoresistance effect elements closely on and under the bit line.
As a result, even upon differential operation or multi-valued recording, reading or writing errors caused by fluctuations of signals can be removed.
Additionally, since the degree of integration of memory cells can be increased and their structure can be simplified, a giant-capacity, high-speed magnetic memory can be realized easily.